JEDEC JESD217.01 – TEST METHODS TO CHARACTERIZE VOIDING IN PRE-SMT BALL GRID ARRAY PACKAGES
As ball grid array component pitch continues to decrease, the need to characterize solder voidinghas become more significant. Solder void manifestation (type and/or sizes) has been used todetermine process capability as a means of quality assurance during process transfer, and asindicators of process stability from in-line manufacturing monitors. This document describeshow to characterize voids in solder spheres in ball grid array packages prior to surface-mount(SMT) reflow soldering.
Product Details
Published:
10/01/2016
Number of Pages:
46
File Size:
1 file , 1.7 MB
Note:
This product is unavailable in Russia, Ukraine, Belarus
