JEDEC JESD51-4A – Thermal Test Chip Guideline (Wire Bond Type Chip)
The purpose of this document is to provide a design guideline for thermal test chips used for integrated circuit (IC) and transistor package thermal characterization and investigations. The intent of this guideline is to minimize the differences in data gathered due to nonstandard test chips and to provide a well-defined reference for thermal investigations.
Product Details
Published:
06/01/2019
Number of Pages:
26
File Size:
1 file , 1.2 MB
Redline File Size:
2 files , 5.8 MB
Note:
This product is unavailable in Russia, Ukraine, Belarus
